Introduction to Advanced VLSI Design | ||
Home | ||
More in B1: Ch.3 | ||
& Ch. 5 (pp.197-207), & Ch.6 (pp253-254) | ||
(B2- Dally’s Book, B1- Rabaey’s Book, v2) | ||
Wires as Interconnects in VLSI | ||
Home | ||
Interconnection Design (transmission lines) | ||
Home reading: B2- 3.3, 3.4, B1- 4.4.5, & 9.4 | ||
Noise in Digital Systems | ||
Home | ||
Noise (Continue) | ||
Home | ||
Signaling Conventions | ||
Home | ||
Signaling Techniques (continue) | ||
Home | ||
Power Distribution Design | ||
Home Reading: , B2: Ch.5.5-5.7 and Power distribution (B2: Ch.5.1-5.4) | ||
System Timing – Timing Conventions | ||
Home | ||
System Timing - Clock Distribution (continue) | ||
Home | ||
System Synchronization | ||
Home | ||
Lecture 12 | System Synchronization - Synchronizer Design (continue) | |
Home | ||
Lecture 13 | Signaling and Timing Circuits (continue) Information and Examples of Exam |
Monday, June 20, 2011
Introduction to Advanced VLSI Design notes ppt
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