Transistor TEchnology

Lecture 1	Introduction & Outline	13,
Lecture 2	Process and Tools Overview	15,
Lecture 3	Magic Layout Intro, Elementary Gates	20,
Lecture 4	Heirarchy; Simulation Intro	22,
Lecture 5	Adders, Layout Techniques	27,
Lecture 6	Control Structures; Sequential Machines	29,
Lecture 7	All About MOSFETS	3,
Lecture 8	FET Parasitics	10,
Lecture 9	Fet Characteristics -> Circuit Behavior	12,
Lecture 10	Tau Model, Buffer Chains	17,
Lecture 11	IRSIM techniques	24,
Lecture 12	Power, Margins, Noise	26,
Lecture 13	Other Logic Styles	3,
Lecture 14	Clocking	17,
Lec. 14 Addendum	The SECS electrical rule checker	17,
Lecture 15	Latches	19,
Lecture 16	Flip Flops, Failure Mechanisms	24,
Lecture 17	Guest Lecture: Corporate IC Design	26,
Lecture 18	Memory Cells	31,
Lecture 19	More on SRAMs	2,
Lecture 20	The Verilog Hardware Description Language	7,
Lecture 21	Analog CMOS	9,
Lecture 22	Adders Revisited	14,
Lecture 23	Guest Lecture: Metastability	21,
Lecture 24	I/O pads, ESD, High Speed Signaling	23,