Sequential Circuits: - Latches (SR, S'R', D) - Flip-flops (Master-Slave, Edge-triggering) - Characteristic Tables/Equations - Asynchronous Set/Reset - Sequential Circuit Analysis: Input Equations, State Tables, State Diagrams - Mealy Vs Moore machines - Timing (FF and Circuit) - Sequential Circuit Design: Design procedure, finding state diagrams/tables, examples. - Sequential Circuit Design: state assignment, designing with D and JK flip-flops, designing with unused states, other design examples - VHDL Language for Sequential Circuit Design Chapter 5, 6.3-6.4 JK-T-FFs Supplement VHDL Supplement pdf1 (bw) pdf2 (bw) pdf3 (bw) pdf4 (bw)Sequential Circuits: - Latches (SR, S'R', D) - Flip-flops (Master-Slave, Edge-triggering) - Characteristic Tables/Equations - Asynchronous Set/Reset - Sequential Circuit Analysis: Input Equations, State Tables, State Diagrams - Mealy Vs Moore machines - Timing (FF and Circuit) - Sequential Circuit Design: Design procedure, finding state diagrams/tables, examples. - Sequential Circuit Design: state assignment, designing with D and JK flip-flops, designing with unused states, other design examples - VHDL Language for Sequential Circuit Design Chapter 5, 6.3-6.4 JK-T-FFs Supplement VHDL Supplement pdf1 (bw) pdf2 (bw) pdf3 (bw) Sequential Circuits:

Sequential Circuits: - Latches (SR, S'R', D) - Flip-flops (Master-Slave, Edge-triggering) - Characteristic Tables/Equations - Asynchronous Set/Reset - Sequential Circuit Analysis: Input Equations, State Tables, State Diagrams - Mealy Vs Moore machines - Timing (FF and Circuit) - Sequential Circuit Design: Design procedure, finding state diagrams/tables, examples. - Sequential Circuit Design: state assignment, designing with D and JK flip-flops, designing with unused states, other design examples - VHDL Language for Sequential Circuit Design

Chapter 5, 6.3-6.4 JK-T-FFs Supplement VHDL Supplement

pdf1 (bw) pdf2 (bw) pdf3 (bw) pdf4 (bw)

Registers: - Registers with Load Enable and with Parallel Load - Register Transfers - Shift Registers, Shift Registers with Parallel Load, Bidirectional/Universal Shift Registers - Serial Transfer/Addition - Shift Register in VHDL Chapter 7 VHDL Supplement pdf (bw)   Counters: - Ripple Counters - Synchronous Binary Counters: design with D and JK flip-flops - Serial and Parallel gating - Binary Up-Down Counter - Binary Counter with Parallel Load - BCD and Arbitrary Sequence Counters - Modulo N counters - Counters in VHDL Chapter 7 pdf (bw